This debugging tool intercepts the traps generated by a 68040 or 68060
processor as soon as it detects an instruction that is valid, but not
implemented in hardware. It is the job of the 68040 or 68060.library to
emulate these instructions in software. FPSPSnoop disassembles these
instructions, and prints the user status of the CPU and FPU at the
time the emulation is entered.
The disassembled instruction as well as as other status information is
printed over the serial port, at 9600 baud, 8 bit, one stop bit, no parity.
A debugging or logging tool like Sushi or Sashimi can be used to display
this output for a one-computer setup.
FPSPSnoop requires the installation of the disassembler.library (DisLib.lha
on Aminet) and the mmu.library (MMULib.lha on Aminet). Both libraries
are not included in this archive.
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The THOR-Software Licence
This License applies to the computer programs known as "FPSPSnoop".
The "Program", below, refers to such program.
The programs and files in this distribution are freely distributable
under the restrictions stated below, but are also Copyright (c)
Thomas Richter.
Distribution of the Program by a commercial organization without written
permission from the author to any third party is prohibited if any payment
is made in connection with such distribution, whether directly
(as in payment for a copy of the Program) or indirectly (as in payment
for some service related to the Program, or payment for some product
or service that includes a copy of the Program "without charge";
these are only examples, and not an exhaustive enumeration of prohibited
activities). However, the following methods of distribution involving
payment shall not in and of themselves be a violation of this restriction:
(i) Posting the Program on a public access information storage and
retrieval service for which a fee is received for retrieving information
(such as an on-line service), provided that the fee is not
content-dependent (i.e., the fee would be the same for retrieving the same
volume of information consisting of random data).
(ii) Distributing the Program on a CD-ROM, provided that the files
containing the Program are reproduced entirely and verbatim on such
CD-ROM, and provided further that all information on such CD-ROM be
redistributable for non-commercial purposes without charge.
Everything in this distribution must be kept together, in original
and unmodified form.
Limitations.
THE PROGRAM IS PROVIDED TO YOU "AS IS," WITHOUT WARRANTY. THERE IS NO
WARRANTY FOR THE PROGRAM, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. THE ENTIRE
RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD
THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY
SERVICING, REPAIR OR CORRECTION.
IF YOU DO NOT ACCEPT THIS LICENCE, YOU MUST DELETE ALL FILES CONTAINED IN
THIS ARCHIVE.
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Installation:
Download the DisLib.lha and MMULib.lha archives from Aminet and install
them if you haven't done so already. Especially, the disassembler.library
and the mmu.library must be placed into LIBS: or any other directory where
an OpenLibray() will find them.
Copy FPSPSnoop to whereever you want.
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Starting FPSPSnoop:
If you do not own two computers and a null-modem cable, you need to run
Sashimi first. Now start FPSPSnoop. The program won't return to the shell
until you abort it with ^C (Control-C) which will de-install it.
To test FPSPSnop, open a new shell and run the TestFPU command. Sashimi
or an external terminal should now show the disassembly of some implemented
instructions.
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Synopsis:
FPSPSnoop NOFPSP/S,NOISP/S,NOOVL/S,NOUVL/S,NOSNAN/S,NOOPERR/S,NOBUN/S,
NOINEX/S,NODIVZ/S,NOUNEA/S,NOUNDT/S
NOFPSP/S If present, do not snoop unimplemented FPU
instructions.
NOISP/S If present, FPSPSnoop does not snoop the
unimplemented integer instruction exception of the
68060. This switch has no effect for the 68040.
NOOVL/S Do not snoop overflow exceptions which are generated
for unnormalized or denormalized results the 040 or
060 cannot handle in hardware.
NOUVL/S Do not snoop underflow exceptions the 040 or 060
cannot handle in hardware.
NOSNAN/S Do not snoop signalling NAN exceptions.
NOOPERR/S Do not snoop operand error exceptions which occur
on invalid arguments to certain FPU instructions.
NOBUN/S Do not snoop "branch on unordered" exceptions that
occur if a branch decision has to be made on an
"unordered" (NAN) result.
NOINEX/S Do not snoop "inexact result" exceptions.
NODIVZ/S Do not snoop "FPU divide by zero" exceptions.
NOUNEA/S Do not snoop "unsupported effective address"
exceptions that are generated by the 060 or 040 if
an addressing mode is used that is not directly
supported by the FPU in hardware.
NOUNDT/S Do not snoop "unsupported data type" exceptions of
the 040 and 060 that happen if you try to read or
write data in "packed decimal" format that is not
supported in firmware.
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Meaning of the snooped output:
Caught 68040/68060 trap conditition: Unimplemented FPU data type
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Cause for the exception. Here an unimplemented FPU
data type, i.e. "packed decimal".
PC : 085a731e SR: ____0_____ USP: 08601198 SSP: 08002548 EA: 085a7334 ( )( )
CPU status at the time of the exception:
PC : program counter, here always set to the problematic instruction
SR : Status register, bits from left to right:
T trace enabled
t trace on instruction flow change enabled (040 only)
S supervisor state enabled
M master state enabled (040 only)
0..7 current interrupt level
X extension bit
N negative bit
Z zero bit
V overflow bit
C carry bit
USP : user stack pointer
SSP : interrupt stack pointer
EA : calculated effective address of the offending instruction,
not necessarily meaningful.
( ) : If an 'I' is present here, interrupts are disabled
( ) : If a 'T' is shown here, task switching is forbidden.
Name : FPUTest
^^^^^^^
Task or command name of the program that contains the offending instruction.
Data : 00000002 00000000 00000008 085fec84 00000001 0217e275 0216ca45 085a7304
^^^^
Dump of the data registers of the CPU at the time of the fault.
Addr : 085a7334 085ff1b0 08015064 085a7304 0860119c 00f9feaa 00f9fe9e 08601198
^^^^
Dump of the address registers of the CPU at the time of the fault. A7 is
either the USP or the SSP, depending on the "S" bit in the SR. MSP usage is
not supported.
EA : 00000000 00000000 00000000 00000140 085a7ad4 085a6e34 0000085a 74d0085a
^^^^^
Dump at the effective address <EA> field whenever available and pointing to
readable memory.
FP0 : 400000008000000000000000 = +2
FP1 : 3ffe0000e8c7b7568da22efe = +0.9092974268256817
FP2 : 7fff0000ffffffffffffffff = +NAN
FP3 : 7fff0000ffffffffffffffff = +NAN
FP4 : 7fff0000ffffffffffffffff = +NAN
FP5 : 7fff0000ffffffffffffffff = +NAN
FP6 : 7fff0000ffffffffffffffff = +NAN
FP7 : 7fff0000ffffffffffffffff = +NAN
^^^^^
Contents of the FPU registers, only for FPU exceptions. The left hand side
presents the FPU registers in extended precision as hex dump, the right hand
side in human readable form.
FPCR : ________.nx FPSR : ____.+00000000 ______2_.____i FPIAR : 085a731e
Various FPU status flags:
FPCR : FPU control register contents, from left to right:
B : branch on unordered exception enabled
S : signalling NAN exception enabled
P : operand error exception enabled
O : overflow exception enabled
U : underflow exception enabled
D : divide by zero exception enabled
2 : inexact operation exception enabled
1 : inexact decimal input exception enabled
Rounding mode: n round to nearest
0 round to zero
+ round to plus infinity
- round to minus infinity
Precision: x extended precision
d double precision
s single precision
? precision setup invalid
FPSR : FPU status register contents, from left to right
N : last result was negative
Z : last result was zero
I : last result was infinity
U : last result was unordered
+/- : Sign of the quotient
... : seven last significant bits of quotient
B : branch on unordered exception pending
S : sigalling NAN exception pending
P : operand error exception pending
O : overflow exception pending
U : underflow exception pending
D : divide by zero exception pending
2 : inexact operation exception pending
1 : inexact decimal input exception pending
v : invalid operation accrued
o : overflow exception accrued
u : underflow exception accrued
d : divide by zero exception accrued
i : inexact exception accrued
FPIAR : address of the offending FPU instruction. Here always
identical to the PC
085a731e : *f210 6c08 fmove.p fp0,(a0){#$8} ;extended opcode
^^^^^^^^
Disassembly of the offending instruction. Here, the problem is the requested
"packed decimal" output format that requires interaction of the 68040 or
68060.library.
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May 2001,
Thomas
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